日期:2014-05-16  浏览次数:20784 次

linux音频alsa-uda134x驱动文档阅读之四(数字音频接口)

转自:http://blog.chinaunix.net/uid-22917448-id-1765505.html

ASoC currently supports the three main Digital Audio Interfaces (DAI) found on

SoC controllers and portable audio CODECs today, namely AC97, I2S and PCM.
ASoC现在支持如今的SoC控制器和便携音频解码器上的三个主要数字音频接口,即AC97,I2S,PCM。


AC97
AC97
====

  AC97 is a five wire interface commonly found on many PC sound cards. It is
now also popular in many portable devices. This DAI has a reset line and time
multiplexes its data on its SDATA_OUT (playback) and SDATA_IN (capture) lines.
The bit clock (BCLK) is always driven by the CODEC (usually 12.288MHz) and the
frame (FRAME) (usually 48kHz) is always driven by the controller. Each AC97
frame is 21uS long and is divided into 13 time slots.
AC97是一种个人电脑声卡上常见的五线接口。现在在很多便携设备中也很流行。这个数字音频接口有一个复位线,分时在SDATA_OUT(回放)和SDATA_IN(捕获)线上传送数据。位时钟常由解码器驱动(通常是12.288MHz).帧时钟(通常48kHz)总是由控制器驱动。每个AC97帧21uS,并分为13个时间槽。


The AC97 specification can be found at :-
AC97说明书可以在下面的网址找到:
http://www.intel.com/design/chipsets/audio/ac97_r23.pdf



I2S
I2S
===

I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
Rx lines are used for audio transmission, whilst the bit clock (BCLK) and
left/right clock (LRC) synchronise the link. I2S is flexible in that either the
controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
usually varies depending on the sample rate and the master system clock
(SYSCLK). LRCLK is the same as the sample rate. A few devices support separate
ADC and DAC LRCLKs, this allows for simultaneous capture and playback at
different sample rates.
I2S是一个4线数字音频接口,常用于HiFi,STB便携设备。Tx  和Rx信号线用于音频传输。而位时钟和左右时钟(LRC)用于同步链接。I2S具有灵活性,因为控制器和解码器都可以控制位时钟和左右时钟。位时钟因采样率和主系统时钟而有不同。LRCLK与采样率相同。少数设备支持独立的ADC和DAC的LRCLK。这使在不同采样率情况下同步捕获和回放成为可能。

I2S has several different operating modes:-
I2S有几个不同的操作模式

o I2S - MSB is transmitted on the falling edge of the first BCLK after LRC
         transition.
I2S模式-MSB在LRC后的第一个位时钟的下降沿传送。

o Left Justified - MSB is transmitted on transition of LRC.
左对齐模式:MSB在LRC传送时传送。

o Right Justified - MSB is transmitted sample size BCLKs before LRC
                     transition.
右对齐模式:MSB在(此句不懂)

PCM
PCM
===

PCM is another 4 wire interface, very similar to I2S, which can support a more
flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used
to synchronise the link whilst the Tx and Rx lines are used to transmit and
receive the audio data. Bit clock usually varies depending on sample rate
whilst sync runs at the sample ra