日期:2014-05-16 浏览次数:20900 次
#define ST16C2550_BASE			0x30000000	//	NCS2	//A口
#define NCSx_PIN				AT91_PIN_PD11	//NCS2
#define IRQ_PIN					AT91_PIN_PA10	// IRQ3
#define ST16C2550_BASE_B			0x40000000	//	NCS3	//B口
#define NCSx_PIN_B				AT91_PIN_PD15	//NCS3
#define IRQ_PIN_B					AT91_PIN_PA8	// IRQ2
static struct plat_serial8250_port st16c2550_data[] = {
		{
			.mapbase	=	ST16C2550_BASE,
			.irq			=	IRQ_PIN,
			.uartclk		=	18432000,
			.regshift		=	0,
			.iotype		= 	UPIO_MEM,
			.flags		=	UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
		},
		{
			.mapbase	=	ST16C2550_BASE_B,
			.irq			=	IRQ_PIN_B,
			.uartclk		=	18432000,
			.regshift		=	0,
			.iotype		= 	UPIO_MEM,
			.flags		=	UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_SKIP_TEST,
		},
		{},
};
static struct platform_device st16c2550_device = {
	.name	= "serial8250",
	.id 		= PLAT8250_DEV_PLATFORM,
	.dev		= {
		.dma_mask = &st16c2550_dmamask,
		.coherent_dma_mask	=	DMA_BIT_MASK(32),
		.platform_data = &st16c2550_data,
	},
};
void __init at91_add_st16c2550(void)
{
	static void __iomem *smc_base;
	/*A NCS2*/
	
	// setup NCSx pin
	at91_set_A_periph(NCSx_PIN, 0);
	// setup irq pin
	at91_set_gpio_input(IRQ_PIN, 0);
	
	at91_sys_write(AT91_SMC_MODE(2),(AT91_SMC_READMODE | AT91_SMC_WRITEMODE
			| AT91_SMC_EXNWMODE_DISABLE
			| AT91_SMC_BAT_SELECT
			| AT91_SMC_DBW_8));
	at91_sys_write(AT91_SMC_CYCLE(2),0x000e000f);
	at91_sys_write(AT91_SMC_SETUP(2),0x03040304);
	at91_sys_write(AT91_SMC_PULSE(2),0x07060807);
	/*B NCS3*/
	
		// setup NCSx pin
	at91_set_A_periph(NCSx_PIN_B, 0);
	// setup irq pin
	at91_set_gpio_input(IRQ_PIN_B, 0);
	
	at91_sys_write(AT91_SMC_MODE(3),(AT91_SMC_READMODE | AT91_SMC_WRITEMODE
			| AT91_SMC_EXNWMODE_DISABLE
			| AT91_SMC_BAT_SELECT
			| AT91_SMC_DBW_8));
	at91_sys_write(AT91_SMC_CYCLE(3),0x000e000f);
	at91_sys_write(AT91_SMC_SETUP(3),0x03040304);
	at91_sys_write(AT91_SMC_PULSE(3),0x07060807);
	platform_device_register(&st16c2550_device);
}